Senior Staff System IP Design Verification Contractor – Austin, TX or San Jose, CA
The Role
We’re seeking an experienced System IP Design Verification Engineer to join a well known electronics manufacturers R&D team. In this role, you will be responsible for verifying complex coherent interconnect and memory controller designs, creating reusable testbenches, and driving best practices for improved productivity. You'll work closely with cross-functional teams to ensure the functionality and correctness of designs.
Key Responsibilities:
- Develop reusable testbenches from scratch for System IP verification.
- Drive verification methodologies, automation, and best practices.
- Collaborate with designers to resolve specification issues and ensure design correctness.
- Perform gate-level simulations (GLS) and work with the SoC, physical design, and performance teams.
- Contribute to power-aware verification and silicon bring-up.
Qualifications:
- 12+ years of experience in design verification.
- Expertise in SystemVerilog, UVM, and testbench development.
- Familiarity with ARM protocols (CHI, AXI, APB) and gate-level simulations.
- Strong scripting skills in Unix/Perl/Python and experience with Git.
- Knowledge of coherent interconnects, caches, and LPDDR memory controllers is a plus.
