Contract (6 months) - W2
Onsite - San Jose CA 95134
As a GPU Design Verification Engineer, you will play a pivotal role in ensuring the quality and reliability of our GPU architecture. Creativity is essential to tackle the challenges of verifying low-power GPU designs. Your versatility and expertise in cutting-edge verification techniques, including the latest IEEE UVM standards, will distinguish you as a top professional in the field.
Role and Responsibilities:-
Collaborate with architects and designers to create verification environments and test plans
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Develop functional verification coverage strategies to ensure comprehensive test suite execution
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Implement assertions and checks to optimize debug time and generate meaningful failure signatures
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Analyze failing tests to determine root causes in partnership with RTL and reference modeling teams
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Provide feedback on architectural and micro-architectural specifications to improve testability and accuracy
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Review code coverage results, identify gaps, and enhance stimulus to strengthen verification
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Take ownership of key milestones, ensuring phase gate pass rates, coverage quality, and other critical metrics are met
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BS in Computer Engineering, Electrical Engineering, or a related field, with 5+ years of industry experience in design verification
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Proficiency in SystemVerilog/UVM/OVM and OOP/C++
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Strong understanding of constrained randomization and efficient test suite development
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Experience with code coverage and functional coverage-driven verification methodologies
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Hands-on experience creating, running, and debugging SystemVerilog/UVM constraint-random testbenches
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Familiarity with scripting languages such as Python or Perl
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Solid understanding of micro-architecture, logic design, FSMs, and arithmetic datapath pipelines
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MS in Computer Engineering or Electrical Engineering with 5+ years of verification experience
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Excellent verbal and written communication skills
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Prior experience with GPU or CPU design is a plus
