The Company
This opportunity is with a global technology leader at the forefront of semiconductor innovation. The company designs and manufactures a broad range of advanced hardware solutions powering mobile, consumer, and enterprise devices across the globe. With a long-standing reputation for delivering cutting-edge technologies in display, memory, and system LSI, the organization is committed to shaping the future of computing through high-performance, energy-efficient design. Their semiconductor division is recognized for pushing the boundaries of performance in AI, mobile, and high-performance computing markets.
Position Summary:
The GPU Design Verification Engineer plays a critical role in ensuring the functional correctness and quality of low-power GPU designs within one of the world’s leading semiconductor teams. This role requires deep technical expertise in functional verification, creative problem-solving, and strong collaboration with architecture and design teams.
The ideal candidate will bring a passion for hardware validation, a solid background in UVM/SystemVerilog methodologies, and a desire to work on some of the most advanced GPU architectures in the industry.
Key Responsibilities:
- Work closely with architects and RTL designers to define verification requirements, environments, and detailed test plans.
- Develop verification infrastructure, including stimulus generators, checkers, and scoreboards, using SystemVerilog and UVM.
- Craft and execute functional and code coverage strategies to ensure thorough testbench quality and completeness.
- Develop assertions and debug failing simulations by working with RTL and modeling teams to isolate and resolve root causes.
- Contribute to architecture and micro-architecture specification reviews with a focus on testability.
- Analyze and optimize code coverage results; refine random constraints and stimulus for improved effectiveness.
- Drive verification closure by meeting coverage goals and delivering against quality gates and milestone checkpoints.
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of experience in hardware design verification.
- Strong command of SystemVerilog, UVM/OVM, and object-oriented programming (C++ or similar).
- Experience developing constrained-random testbenches and coverage-driven verification methodologies.
- Familiarity with simulation tools, debug environments, and waveform analysis.
- Proficient in scripting with Python, Perl, or equivalent languages.
- Solid grasp of digital logic fundamentals including FSMs, pipelining, and datapath architecture.
- Master’s degree in Electrical or Computer Engineering.
- Prior experience with GPU or CPU verification environments.
- Effective communication skills and the ability to document complex technical concepts clearly.
- Demonstrated experience working across multiple functional teams in a collaborative engineering environment.
